SFR explanation for PIC16F873(15)

The value in the parenthesis is in the condition immediately after the turning on.

SPEN : Serial Port Enable bit

1 : Serial port enabled ( ConfiguresRC7/RX/DTandRC6/TX/CKpinsasserialportpins ) 0 : Serial port disacled

RX9 : 9-bit Receive Enable bit

1 : Selects 9-bit reception 0 : Selects 8-bit reception

SREN : Single Receive Enable bit

Asynchronous mode Don't care Synchronous mode - master 1 : Enables single receive 0 : Disables single receive This bit is cleared after reception ic complete. Synchronous mode - slave Unused in this mode

CREN : Continuous Receive Enable bit

Asynchronous mode 1 : Enables continuous receive 0 : Disables continuous receive Synchronous mode 1 : Enables continuous receive until enable bit CREN is cleared ( CREN is overrides SREN ) 0 : Disables continuous receive

ADDEN : Address Detect Enable bit

Asynchronous mode 9-bit ( RX9 = 1 ) 1 : Enables address detection enable interrupt and load of the receive buffer when RSR<8> is set 0 : Disables address detection all bytes are receive, and ninth bit can be used as parity bit

FERR : Framing Error bit ( Read only )

1 : Framing error ( Can be updated by reading RCREG register and receive next valid byte ) 0 : No framing error

OERR : Overrun Error bit ( Read only )

1 : Overrun error ( Can be cleared by clearing bit CREN ) 0 : No overrun error

RX9D : 9th bit of receive data ( Read only )

TXREG ( Transmit buffer ) 19h

Transmit data is set to this buffer.

RCREG ( Receive buffer ) 1Ah

Received data is stored to this buffer.